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| Full day (7 hours) and half day (3.5 hours) educational courses are led by internationally respected professionals with extensive experience in the subject area. Course instructors deliver focused, in-depth presentations on topics of current importance to the industry, based on their research and industry experience. |
Tutorials are application oriented and structured to combine field experience with scientific research to solve everyday problems. Tutorials are offered on Sunday, Monday, and Thursday to provide you the opportunity to attend the conference sessions and visit the exhibit floor.
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SUNDAY, October 24
 Manufacturing and Assembly -
Sunday
T1
SMT Process Fundamentals for Tin-Lead, Lead-Free and Mixed Assembly
S. Manian Ramkumar Ph.D., Rochester Institute of Technology
Sunday, October 24
8:00am – 11:30am, Oceanic 2
What You Will Learn
This course will provide an introductory understanding of the surface mount and mixed technology assembly processes for lead based and Lead-Free electronics packaging. Topics include coverage of PCBs, assembly types, component types, assembly process, assembly materials, identification of defects, troubleshooting and process control. Critical design tips for ease of manufacture and assembly will be discussed throughout the course. Tradeoff decisions between different materials and equipment types will also be highlighted. A good comparison of lead based and Lead-Free process will be provided, including implementation.
Topics Covered
Electronics packaging and levels
PCB types, materials and manufacturing
SMT components
Stencil printing
Adhesive dispense
Component placement
Soldering-reflow, wave and selective
Cleaning – materials, process, and no-clean process
Test, inspection, rework and repair
Who Will Benefit
Process, design, test and quality engineers; process and quality technicians; operators; marketing, sales and purchasing staff;; managers; people with very little or no background in SMT
T2 Design and Assembly Challenges of Ball Grid Arrays (BGAs) and Bottom Terminations Components (BTCs) in a Lead-Free World
Ray Prasad, Prasad Consultancy Group
Sunday, October 24
8:00am – 11:30am, Oceanic 4
What You Will Learn
There is no doubt that Lead-Free has impacted on almost everyone in the electronics industry, from suppliers of components, boards and materials to manufacturers and users of electronics products and equipment including the military and medical industry. The Lead-Free train has been moving fast, even if you work in a currently exempt industry you need to get onboard or risk losing market share to competitors particularly when the leaded products and components you are using become only available in Lead-Free.
Learn how to resolve issues for an effective implementation of BGAs and Bottom Terminations surface mount components such as QFN, DFN and MLF in a Lead-Free world at a lower cost and higher yield.
Designing for BGA and BTC can involve trial and error and lot of frustration. Additional frustration is caused by fast-paced changes in packaging technologies and the advent of Lead-Free has compounded the designer's task.
The objective of this course is to identify the design and process issues in BGAs and BTC and the impact of Lead-Free that must be resolved for an effective implementation of mixed assembly electronics products for both tin lead and Lead-Free.
This is not a theoretical course it is based on Mr. Prasad's over two decades of experience at Boeing, Intel and numerous clients, this course deals with "real-world" problems in Lead-Free implementation.
Topics Covered
Overview of BGAs and BTCs
Why conversion to lea free solders is necessary & its Impact on materials and assembly processes
Design Issues for Lead-Free: laminates, surface finishes and component considerations
Design and process guidelines for BGAs and BTCs
Backward and forward compatibility: issues and answers
Key strategies in design and manufacturing processes to prevent field returns
Who Will Benefit
Anyone in process, quality, manufacturing, design, purchasing and management who wants to get a good understanding of design and manufacturing issues in SMT, BGAs, BTCs (QFN, MLF), for building assemblies in-house or at a subcontractor will benefit from this course.
T3 QFN (Quad Flat No-lead) Design LGA (Land Grid Array), Assembly & Rework Guide
Bob Willis, ASKbobwillis.com
Sunday, October 24
1:30pm – 5:00pm, Oceanic 1
What You Will Learn
LGA and QFN have fast become a common package type often used in many professional portable products. With any new device type there is always a learning curve for design, process, and quality engineers who have to get to grips with the challenges that these packages bring. Each step of the implementation process for LGA/QFN devices will be reviewed along with results of practice process trials with these devices. The instructor is well known for his practical workshops and is supported by Bob Willis unique process video experiments where LGA/QFN are guaranteed to come alive. A FREE set of optical and x-ray inspection charts (a $100 value) to use in manufacture is included for each student.
Topics Covered
Component package types
Component construction
MSD handling levels
Solderability testing packages
Printed board layout on rigid and flexible circuits
Soldermask layout options
Lead-Free stencil printing options
Placement and component packaging
Convection and vapor phase soldering yields
Visual inspection criteria
X-Ray inspection criteria
LGA/QFN rework and replacement
Array solder joint reliability
Common process problems with LGA/QFN
Who Will Benefit
Designed for design, process, and quality engineers responsible for introducing products containing LGA/QFN. Much of the material presented is extremely visual and practical making it ideal for manufacturing staff. Like all the instructors workshops, it not just theory, it's a "How to Do It Session".
T4 The "Deadly Sins" of SMT and Lead-Free Assembly
Phil Zarrow, Joseph Belmonte and/or W. James Hall, ITM Consulting
Sunday, October 24
1:30pm – 5:00pm, Oceanic 2
What You Will Learn
Everyone has heard of the "7 Deadly Sins". There are also the "10 Deadly Sins" of SMT – and there are actually more than just 10 – and they can make your assembly process a nightmare.
Sometime imitated, this is the "original" (and most authentic and authoritative) examination and discussion of assembly sins. During the course of our assembly process audits and troubleshooting work, we tend to see trends in the types of errors and problems. In other words, a lot of people are making the same mistakes. The resulting process problems wreak havoc with an impact on assembly yields ranging from 5 to 20%. In addition to this direct cost, there is also additional financial impact with regard to time spent reworking and repairing, the on corrective action by QC, Engineering and Management, and, of course, "do-over".
This course identifies the "deadly sins" of SMT assembly, both for Pb-free and "leaded" processes. Besides the symptoms and consequences of each type of error, root-cause, rectification and prevention techniques will be presented. The workshop will, thus, provide the participant with an understanding of how to identify and correct the most common SMT assembly problems. It will include identification of vendor and source problems including components and materials as well as design related problems.
With the Deadly Sins being bad practices and mistakes assemblers perpetrate upon themselves, there are also trends and directions that are beyond our control. These are the "4 Horsemen of the Assembly Apocalypse". As overwhelming as these may be, we have to and can deal with these. This course will help offer assembler salvation.
Topics Covered
- Areas of General Process "Sins"
- Utilization of process feedback data
- Design for manufacturability and assembly
- In-process inspection and AOI
- Solder paste selection
- MSD
- Procedures and documentation
- Stencil printing
- Component placement and feeders
- Reflow and wave soldering challenges
- Inefficiency: unbalanced lines and excessive downtimes
- Lead-Free Specific Process "Sins"
- Uncontrolled mixed assembly
- Stencil design, inspection and wave soldering
- The 4 Horsemen of the Assembly Apocalypse
- Design for manufacturability
- Leading and "bleeding" edge components
- Surviving in a Lead-Free world
- Counterfeit components and materials
Who Will Benefit
Intended for manufacturing, process, design, test and quality engineering personnel as well as management involved in the production of surface mount or mixed technology assemblies
T5 Design for Manufacturability in A Lead-Free World
Ray Prasad, Prasad Consultancy Group
Sunday, October 24
1:30pm – 5:00pm, Oceanic 4
What You Will Learn
Designing for SMT can involve trial and error and lot of frustration. Additional frustration is caused by fast-paced changes in packaging technologies and the advent of Lead-Free has compounded the designer's task. This course draws on the instructor's experience in developing DFM and Land Patterns at Intel Corporation where he was the SMT Program Manager and the course provides detailed DFM guidelines for both tin-lead and Lead-Free assemblies.
Topics Covered
- Introduction
- General DFM considerations
- Why Lead-Free? Legislation and market forces
- Major impact of LF on soldering process
- LF vs tin-lead impact on reliability
- DFM for Lead-Free only
- Laminates for Lead-Free
- Lead-Free surface finishes
- Component considerations
- Effect on MSL level and reflow profile
- DFM for both tin-lead and Lead-Free Soldering
- Layer count and via size considerations
- Orientation and inter-package spacing
- Land pattern and stencil considerations
- Fiducials, soldermask and paneling
- Design for test, repair and cleaning
Who Will Benefit
Anyone in management, engineering, purchasing, design, process, quality and manufacturing who are working with tin-lead or Lead-Free using SMT, fine pitch and BGA or plans to get into it in the future will benefit from this course. Attendees will learn technical details to help solve design and manufacturing problems and develop the internal DFM document to help develop a self-sustaining internal infrastructure which is critical in achieving design and manufacturing process stability in a constantly changing technology and organizational environment.
SUNDAY, October 24
Substrates -
Sunday
T6 Taking Stress Out of Lead-Free Assembly by Weeding Out PCB Fabrication Defects Before Assembly
Bihari Patel, Research In Motion
Sunday, October 24
8:00am – 11:30am, Oceanic 6
What You Will Learn
With the Lead-Free transition and green revolution changes are made at Assemblers and Fabricators to meet demands of new Legislations for Lead-Free Printed Circuit Boards presenter will share his experiences. Global sourcing of PCBs is a reality with larger batch quantities, to prevent line stoppage and expensive rework, it is important that emphasis be placed on PCBs prior to assembly to highlight issues and prevent future issues prior to use. This will result in ensuring quality PCBs are entering in the assembly process, resulting in higher first pass yield and reduced rework associated with PCB quality deficiency. This course will highlight any deficiency in fabrication and ones following best practices will be exhibit their strengths against other fabricators. This will also cover key result areas in Lead-Free Assembly Process.
Topics Covered
Circuit boards in Lead-Free & leaded assembly showing defects experience related to PCB fabrication
101 Basics of PCB Fabrication for Assemblers & OEM
Process Control & applicable specifications for outgoing PCB quality
Descriptions with examples of applicable test methods, including reference to IPC documentation
Top defects will be highlighted & with emphasis on how to detect, report & get corrective actions for prevention
Twenty defects will be highlighted & with emphasis on how to detect, report and correct
Fabricator selection, source inspection & ongoing preferred fabricator audits
Case studies
Who Will Benefit
Recommended for designers, process and quality engineers, managers, process operators, technologists, component manufacturers, PCB fabricators, equipment vendors, and suppliers. Participants encouraged in bringing their samples and issues for hands on discussion or email the issues before hand so that it is covered in the presentation.
SUNDAY, October 24
Quality and Reliability -
Sunday
T7 Counterfeit Component Inspection - Problems and Solutions
Bob Willis, ASKbobwillis.com
Sunday, October 24
8:00am – 11:30am, Oceanic 1
What You Will Learn
Quality, purchasing, design and production engineers need to review the growing commercial and technical issues surrounding counterfeit electronic components. They can look right, solder to the PCB but just fail to function. A typical first assumption by test engineering, it's a component failed due to the assembly process, but its what's inside the package that counts, sometimes its nothing at all.
Rather than making complicated copies of parts, the simplest thing is to remark the packaging or the component body. Remarking the packaging is simple and quick, provided the component identification is not checked all the parts would be placed and soldered to the board before the problem was identified. AOI should find incorrectly marked or variations on the parts but the level of sophistication in marking is now becoming very sophisticated.
The course will not only illustrate the problems raised by counterfeit components within the electronics industry, but it will also show you some of the different test methods that can be used to confirm the integrity of the components. Failure analysis techniques are now frequently being used to see if components are what they say they are rather than finding failure modes. Regular workshops with ITRI innovation in the UK show that counterfeiting is on the increase, we can find them, and there is no hiding place! The course also includes a FREE set 28 wall charts (a $100 value) covering testing and counterfeit avoidance procedures for each student.
Topics Covered
Component trends in industry
Counterfeit avoidance strategy
Component identification check sheet
Component obsolescence
Impact of Lead-Free on component availability
Typical examples of component counterfeits
Guidelines on reducing the possibility of counterfeits
The different types of counterfeit
Mechanical testing component packaging
Destructive and non-destructive
Electrical testing of components
Visual & microscopic inspection
Solvent testing
XRF techniques
X-ray inspection of passive and active parts
Practical examples of counterfeit components found
Using free on line defect database
Who Will Benefit
Designed for design, process and quality engineers responsible for introducing procedures and testing to avoid the counterfeit components being integrated to products.. Much of the material presented is extremely visual and practical making it ideal for manufacturing staff. Like all the instructors workshops it not just theory, it's a "How to Do It Session".
T8 True Design for Reliability-What Is and What Is Not DfR
Craig Hillman, Ph.D. DfR Solutions
Sunday, October 24
1:30pm – 5:00pm, Oceanic 6
What You Will Learn
As the "design for" philosophy has expanded and spread through the electronics marketplace and has become identified with best practices, an expected dilution of understanding DfR has occurred. True DfR requires a technical knowledge of electronic packaging, discrete components, printed board, solder assembly, and connectors - and how these aspects of electronics can fail in regards to environmental stresses. This course will NOT discuss DFMEA, HALT, accelerated life testing, field performance or failure analysis.
Topics Covered
Recognizing what is DfR, and what is not DfR
Common mistakes in part selection and placement
A common-sense approach to derating and uprating
Guidelines for part placement and orientation
Design rules for printed board fabrication
Design for assembly - hand vs. wave vs. reflow soldering
Wear-out mechanisms and physics of failure
Predicting degradation in today's electronics and wear-out of the next generation of ICs
Who Will Benefit
This course is for product and design engineers, engineering managers, senior design technicians, quality and reliability engineers, consultants and academic specialists requiring a technical knowledge of electronic packaging, discrete components, printed board, solder assembly and connectors and how these aspects of electronics can fail in regards to environmental stresses.
MONDAY, October 25
Manufacturing and Assembly -
Monday
T9 Troubleshooting the Electronics Assembly Process - An Analytical Approach
S. Manian Ramkumar, Rochester Institute of Technology
Monday, October 25
8:00am – 5:00pm, Oceanic 2
What You Will Learn
This course provides a good understanding of a systematic approach that can be employed in troubleshooting the Surface Mount Technology (SMT) and Through Hole electronics packaging process. This course will include a detailed discussions on the analytical process to be used, and will engage the participants actively in solving case studies in class. The participants are encouraged to bring problems to solve in the class. The participants will work in teams of and will solve the problem by thoroughly defining the problem, finding the root causes and determining the appropriate fix. The knowledge gained from this training will help companies enhance product development, manufacturing and yield and systematically address the root causes of any problem.
Topics Covered
- Defining the problem
- List the different concerns
- Separating and clarifying the concerns
- Set priority for multiple concerns
- Define the problem for each concern\
- Identifying the root cause
- Describe the problem in detail
- Establishing the problem specifications
- Developing possible causes by identifying the differences and changes using knowledge & experience
- Testing the possible causes against specifications
- Select the most probable cause and verifying
- Finding a fix for the root cause
- Develop and classify the objectives for the decisions to fix root cause
- Identify and evaluate the alternatives
- Identify the risks with alternatives
- Make decision
- How to avoid future problems?
- Identifying potential problems
- Identifying likely causes
- Taking preventive action
Who Will Benefit
Process, design, test and quality engineers; process and quality technicians; managers
T10 Advanced SMT Manufacturing
Phil Zarrow, Joseph Belmonte and/or W. James Hall, ITM Consulting
Monday, October 25
8:00am – 11:30am, Oceanic 4
What You Will Learn
The circuit board assembler is constantly challenged by components that seem to defy logic and manufacturability. Passives such as 0201s and 01005s, while bringing happiness to the designer with regard to layout densities are the bane of the assembler. IC packaging also has adhered to the mantra of "smaller, faster" taunting the assembler with land-grid arrays, QFNs, and high-density CSPs and Flip-chips. Yet, manufacturing PCBAs with these "bleeding edge" components is not insurmountable, (though not for the weak of heart).
This advanced course is intended to provide the experienced participant with a thorough yet practical approach to dealing with today's challenges of Surface Mount Technology manufacturing. High manufacturing yield can best be attained by understanding and successfully implementing the appropriate process considerations. This workshop will give the participant a true comprehension of the SMT assembly processes and associated materials. The very latest and best methodologies and philosophies regarding process optimization will be presented and discussed. Optimizing the SMT assembly process, as it pertains to very small and high-density components will thus be covered, including DFM guidelines, solder paste, Screen/Stencil Printing, Component Placement, Reflow, Inspection and Rework. The impact of Lead-Free and RoHS compliance will, of course, also be discussed. Case studies based upon the instructor's experience will be presented. Most important, particular attention will be paid to the sources of problems that occur within the assembly process.
Topics Covered
- Component Issues
- Very small passives
- ICs: QFNs, Ultra-Fine Pitch BGAs, CSPs and flip chips
- 3-D assembly: PoP
- Design for Manufacturability Considerations
- Via in pad
- Lead-Free PCB materials and surface finishes
- Solders
- New alloy compositions
- Fluxes: WS vs no clean + cleaning
- Solder Paste Printing and Deposition
- Stencil design for multi-pitch (broadband or mixed technology) printing
- Jet printing
- Soldering SMT and Thru Hole
- Advanced reflow requirements for complex components and layouts
- Realities of soldering Lead-Free solder alloys
- Vapor phase and selective soldering
- Inspection and Verifications
- LEAN vs in-process inspection
- Autotmated optical inspection (AOI)
- X-ray and X-ray tomography inspection
T11 Conformal Coating Applications, Inspection, Rework & Quality Control
Bob Willis, ASKbobwillis.com
Monday, October 24
1:30pm – 5:00pm, Oceanic 6
What You Will Learn
The use of Conformal Coating has provided benefits to the industry for many years, either in the high reliability market sector or where products have to deal with extreme environmental conditions or simply in use in consumer applications. The use of coatings is seen in different industries like telecommunications, automotive and consumer products which have benefited from the use of selective coating but for different reasons.
This course will provide a simple guide to the use of coatings, their application and process, product benefits, inspection and quality control. A practical session will also allow delegates to examine coated boards using different materials and inspect the coating application.
Each attendee will also receive a FREE set of color Inspection Wall Charts (a $100 value) covering coating application and common defects to use on their manufacturing shop floor. During the class there are opportunities to win some of Bob's interactive CD ROMs for best questions of the session.
Topics Covered
Why conformal coat
Clean or no clean
Coating material options
Coating process options
Cost of coating assemblies
SIR and cleanliness testing
Cleanliness testing methods
Reliability of coating
Testing & evaluation of coatings
Correct design for coating
Masking options and methods
Inspection & quality control of coating
In-house or contracting services
Inspection of coatings & methods
Rework & repair of board assemblies
Who Will Benefit
Ideally suited to design, production and quality engineers looking at future technology and maintaining a company technology roadmap. It's vital to subcontractors to be up-to-date with new technology and its possible implementation along with material and equipment requirements for future customers.
T12 SMT Manufacturing in the New Decade - Reliability
Jennie Hwang, Ph.D., H-Technologies Group
Monday, October 25
8:00am – 11:30am, Oceanic 8
What You Will Learn
This course focuses on the new developments that contribute to the reliability of the PCB assemblies including new PCB surface finishes for both PCB and component substrate.
As intermetallic compounds play an increasingly critical role to the performance and reliability of solder interconnections in the chip level, package level and module level of electronics, the important aspects of intermetallic compounds ranging from scientific fundamentals to practical application scenarios will be discussed. Intermetallic compounds before solder joint formation, during solder joint formation and after solder joint formation in storage and service will be examined. The differences between SnPb and Pb-free solder joint in terms of intermetallic compounds, which in turn account for on-production-floor phenomena and the actual field performance will be discussed.
The course will also address the overall performance of SAC305 and SAC405, as well as the low-Ag SAC alloys and other newer alloys recently introduced to the market. Some published reliability test results will be selected for case studies to illustrate the impact of test parameters on the test results. The importance of data interpretation, which plays a pivotal role to reaching a plausible conclusion, will also be illustrated.
A summary of the new developments in RoHS and a highlight on what are on the horizon – alternative Lead-Free solder alloys, printed electronics and solar photovoltaics will conclude the course. Solder joint integrity and system reliability will be illustrated by dissecting the published thermomechanical fatigue, creep, drop test and other testing data through case studies.
Topics Covered
New surface finishes – types, characteristics
Overview – Pb-free vs. SnPb –distinctions, commonalities
Phase diagrams – Pb-free vs. SnPb
Intermetallics – fundamentals, characteristics, phase diagram
Intermetallics from surface finish vs. effects on solder joint reliability
Intermetallics from solder alloy vs. effects on solder joint reliability
SAC solder joint performance - overview
Low-Ag SAC solder alloys – performance, reliability
Alternative Pb-free solder alloys – performance, reliability
Reliability definition – engineering, practical
Solder joint reliability – data vs. performance criteria (BGA, QFN, LGA, PoP, QFP)
Case study – reliability data - effects of test parameters, data interpretation, failure mode
RoHS – status, new developments
Future developments – alternative Pb-free alloy, print electronics, solar photovoltaics
Who Will Benefit
The course provides a working knowledge to all who are involved with or interested in SMT production and end-product reliability of SnPb and Pb-free packaging and assembling including designers, engineers, researchers, managers and business decision makers; also designed for those who desire the broad-based information.
T13 SMT Manufacturing in the New Decade – Materials and Processes
Jennie Hwang, Ph.D., H-Technologies Group
Monday, October 25
1:30pm – 5:00pm, Oceanic 8
What You Will Learn
As SMT manufacturing moves into a new decade, this course, with focus on the new and emerging developments, as well as cover all important aspects of solder materials, PCB bare board, and modular processes for both Pb-free and SnPb assemblies. New processes, current issues and selected production defects (Head-on-Pillow defect, PCB Pad cratering, passive 01005 assembly, copper dissolution, new development in tin whisker and others) will be discussed.
The state of the industry and the advanced packages, e.g. Package-on-Package (PoP), various BTCs will be reviewed. The best practices of assembling BTC (QFN, LGA, SON, DFN) and Package-on-Package (PoP) will be discussed. Key principles and practices in solder paste deposition techniques (printing, dipping) and halogen-free solder paste, as well as the renewed interest in vapor phase soldering and the optimal reflow profiling for Pb-free soldering will be discussed. The course will also outline the PCB thermal properties and halogen-free PCB laminates.
Attendees are encouraged to bring their issues and topics to the coourse for discussion and solutions.
Topics Covered
Overview – semiconductor, packages, assembly
Advanced packages – new or emerging packages
BTC (QFN, LGA, SON, DFN) – challenges, material, process, best practice
Package-on-Package (PoP) assembly – challenges, material, process, best practice
Halogen–free solder paste – best practice
Solder paste printing and dipping – paste rheology, stencil design, performance, process parameters
Reflow techniques – convection vs. vapor phase
Reflow profiling for Pb-free assembly – best practice, optimal profile
PCB – thermal properties for Pb-free assembly
PCB – halogen–free laminates
PCB Pad cratering – causes, solutions
Head-and-pillow defect – causes, factors, remedies
Copper dissolution – impact on thru-hole solder joint reliability
Tin whisker – new development
Passive 01005 assembly – process, factors, best practice
Who Will Benefit
The course provides a working knowledge to all who are involved with or interested in SMT production and end-product reliability of SnPb and Pb-free packaging and assembling including designers, engineers, researchers, managers and business decision makers; also designed for those who desire the broad-based information.
MONDAY, October 25
Soldering -
Monday
T14 Head and Pillow (HnP) SMT Failures in Electronic Assemblies and How to Prevent Them
Dudi Amir, Intel Corporation
Monday, October 25
8:00am – 11:30am, Europe 1
What You Will Learn
As the industry moves toward Lead-Free soldering and Ball Grid Array packages with thinner and finer pitch, there is an increase in SMT non-wet types of defects known as head-and-pillow defect. This defect is hard to detect after SMT assembly and most likely will fail at the customer. This course will cover the most common failure modes causing head-and-pillow in electronic assemblies. The causes of each head-and-pillow defect mode will be explained and examples of each will be detailed. The course will also discuss ball on pad, a defect that is very similar to head-and-pillow, which has increased in recent years in electronic assembly. The course will discuss how to identify the root cause of the failure, and it will give potential solutions to prevent the defect from happening and create a robust SMT assembly process. Also discussed will be various failure analysis techniques to identify head-and–pillow non wet. Finally a few head-and pillow case studies will be reviewed.
Topics Covered
- Head & pillow definition
- The challenge and risk
- Detection risk
- Defect mechanism
- Defect mode category
- Process related failure modes
- Solder volume
- Misplacement
- Incomplete reflow
- Reflow profile parameters
- Contamination
- Material related failure modes
- Solder paste key properties
- Solder ball oxidation
- Solder ball alloy
- Dynamic warpage
- Ball on pad
- Co-planarity
- Paddle insertion
- Solder ball true position
- Boards warpage and sag
- Moisture induced HnP defects
- Design related failure modes
- Board design
- Package standoff gap
- HnP failure analysis
- HnP case study
Who Will Benefit
This course will benefit anyone involved in the design, assembly or troubleshooting of PCB assemblies or BGA packages. It will also benefit those who are responsible for system reliability or supplier quality functions. Also anyone involved with transitioning products or processes to Pb-free would greatly benefit from the material presented. Lastly people who are responsible for failure analysis will find the course very informative.
MONDAY, October 25
Advanced Packaging -
Monday
T15 3 Dimensional Assembly, Packaging and Integration
Charles Bauer, Ph.D., TechLead Corporation
Monday, October 25
1:30pm – 5:00pm, Oceanic 4
What You Will Learn
The latest trend in miniaturization of electronics systems, 3D assembly, and packaging of both active and passive devices, opens a new world of performance and integration to system designers. This course covers both the fundamental and advanced technologies in use today to produce stacked chip packages as well as stackable packages for implementation of highly integrated mobile electronic products. These include the challenges of die thinning, thin die attach, multi-level wire bonding, mixed technology die attachment and bonding, flip chip, TAB and TSV (Through Silicon Via) technologies. Substrate selection for various 3D packaging techniques including silicon tiles, flex circuit origami and specialty interposers concludes the chip stacking section of the course. Several examples of specific 3D package structures demonstrate both the power and limitations of these approaches.
Further considerations for 3D electronics include stackable packages based on flex and rigid substrate approaches, integrated system in package (SiP) techniques and multilayer, embedded passive technologies. Additional coverage of SMT design and assembly implications rounds out the technical content of the course. The course concludes with a review of the drivers behind 3D packaging and presentation of multiple examples of 3D packages in actual usage today.
Topics Covered
- 3D package trends
- 3D package applications
- Stacked packages
- Package on Package
- Origami
- Edge stacked modules
- Die stacking
- Wire bond
- Mixed technology
- Edge redistribution
- Through silicon vias
- 3D integration (SiP)
- Issues in 3D integration
- SMT assembly implications
- Drivers for 3D packaging
- Intellectual property landscape for 3D packaging
Who Will Benefit
This course covers basic and advanced topics for product and design engineers, manufacturing process and assembly/packaging engineers, engineering managers, senior design technicians, consultants and academic specialists as well as marketing and sales personnel requiring an understanding of the capabilities, implications and options of 3D packaging and assembly technologies.
T16 Package on Package (PoP), Design, Assembly, Rework and Inspection
Bob Willis, ASKbobwillis.com
Monday, October 25
8:00am – 11:30am, Oceanic 6
What You Will Learn
Package on Package (PoP) applications are growing in popularity for mobile and handheld applications and with it placing further demands on assembly engineers. In simple terms POP represents the stacking of components one on top of another either during the original component manufacture or during printed board assembly. As real estate is at a premium for logic and memory, PCB designers say the only way to go is up and up. POP packaging systems may include direct soldering, wire bonding or conductive adhesives for device to device interconnection.
PoP is new to many contract and OEM assembly staff but with the demands of paste dipping, reflow warpage, increased placement accuracy/Z height control process introduction can be demanding. The difficulty in multi level ball inspection can be a challenge for x-ray equipment procedures as level one balls can mask level two and three interconnections. Manual inspection can be used but with these applications space is often not available for side viewing.
Each student will receive a FREE set of Package on Package inspection and quality control wall charts (a $100 value) covering optical and x-ray inspection, dip flux and paste application, placement criteria and defects seen during assembly.
Topics Covered
What is Package on Package (PoP)
Benefits of PoP stack packages
Component standards
PCB design rules
Lead-Free assembly
Engineering interviews
Stencil printing
POP placement, tack flux, and dip solder paste
Reflow soldering, convection, vapor phase, temperature profiling
Inspection-optical and x-ray
Underfill
Rework
Package on package defects
Who Will Benefit
This class is ideally suited to design, production and quality engineers looking at future technology and maintaining a company technology roadmap. It's vital to subcontractors to be up-to-date with new technology and its possible implementation along with material and equipment requirements for future customers.
MONDAY, October 25
Quality and Reliability -
Monday
T17 Common Failure Modes in Electronic Packages and Assemblies and How to Avoid Them
Andrew Mawer, Freescale Semiconductor
Monday, October 25
8:00am – 11:30am, Oceanic 3
What You Will Learn
This course will cover many of the most common component-level and package to board Pb-free and SnPb-based solder interconnect failure modes experienced by electronic assemblies. These include failures that occur during the assembly process as well as those that occur with systems in the field or during accelerated testing. The root cause of each failure will be explained and examples of each will be detailed. Examples of the many ways that leaded, leadless and BGA solder joints fail to form properly in reflow or become open or shorted after forming correctly will be covered. Special mention will be made of failure modes that are more prevalent with the transition to Pb-free such as solder joint fracture from drop or shock, possible increased component or PCB warpage due to higher soldering temperatures, soldering failures related to utilizing mixed Pb-free and SnPb metallurgies and solderability failures with Pb-free terminations. Failures observed with new package types such as package on package (PoP) and fine pitch leadless packages will be covered. Finally, some internal package failure modes such as delamination, various opens that occur within packages such as the failures of vias and traces in organic substrates will be discussed. The emphasis will be on the prevention of all the failure types discussed and solutions and strategies to that end will be outlined. Finally, various analytical techniques used to analyze and understand failures in electronic assemblies will be reviewed.
Topics Covered
General soldering discussion to include profiling and optimization, thermocouple attachment and
BGA solder joint failure modes to include ball in cup opens, warpage, PoP shorting, fatigue failure
Leaded package solder joint failure modes
Tin whiskers
Leadless package failure modes
Internal component failure modes
Analysis and characterization techniques
Who Will Benefit
This course will benefit anyone involved not only in the design, assembly or troubleshooting of PCB assemblies containing a range of leaded, leadless or BGA packages, but also those within the system reliability or supplier quality functions. Also, people who are responsible for carrying out or interpreting failure analysis would greatly benefit from the material presented. Since Pb-free will be a theme throughout the course, anyone involved with transitioning products or processes to Pb-free will find the course very informative.
T18 The Reality of Pb-Free Reliability
Randy Schueller, Ph.D., DfR Solutions
Monday, October 25
1:30pm – 5:00pm, Oceanic 3
What You Will Learn
Although July 2006 has passed, the potential reliability implications of switching to Pb-free materials and a Pb-free process will potentially be felt for years to come. Numerous American companies in industries exempt from RoHS have already decided to make the jump to Pb-free. These include automotive, appliance, telecommunications, and military. These applications demand long-life in potentially severe operating environments. Understanding how to predict and ensure quality (can I make Pb-free just as good as SnPb?) and long term reliability (will it last just as long?) is critical to customer satisfaction and, eventually, the success of your company. This presentation provides a focused but comprehensive discussion on all potential issues that can arise during the transition to Pb-free. All areas of potential risk are examined. For each reliability concern, a brief description is provided, followed by the current state of industry knowledge and an opportunity for risk mitigation based upon the product design, materials, complexity, volumes, and customer expectations of reliability. A final summary provides the attendees a roadmap for ensuring the reliability of Pb-free product.
Topics Covered
- Introduction
- Review of RoHS legislation
- What has changed?
- Components, including popcorning
- Tin whiskering
- Solderability platings (ENIG, immersion tin, immersion silver, and OSP)
- Printed board robustness
- Solder
- Copper dissolution, tin pest, and alternate alloys
- Reliability
- Temperature cycling and vibration
Who Will Benefit
This course is intended as an introductory to intermediate level course for board-level designers, component engineers, quality engineers, reliability engineers, and their manager
T19 Contamination and Cleanliness: Developing Practical Responses to a Challenging Problem
Craig Hillman, Ph.D., DfR Solutions
Monday, October 25
1:30pm – 5:00pm, Europe 1
What You Will Learn
To understand the challenge of contamination and cleanliness, one only needs to look at the many problems associated with high reliability environments, such as those encountered in automotive, and military applications. Particularly, high humidity exposure (85 % RH 85 C) can result in shorting occurring in less than 168 hours, due to dendritic growth and corrosion. This issue, in turn, can result from poor cleanliness both before solder mask and after soldering. In addition, the "desire" to be halogen-free in PCBs and solder pastes, coupled with the Lead-Free transition, is causing NEW problems. For example, in automotive applications many systems in a car have voltage applied to some parts continuously, which can precipitate Conductive Anodic Filament Formation.
Topics Covered
- Overview of contamination and cleanliness
- Drivers
- Temperature
- Humidity / moisture
- Voltage and electric field
- Contamination
- Sources of contamination
- Printed board fabrication
- Fluxes / assembly
- Handling
- Use environment
- Detection and measurement
- Types of equipment and processes
- Industry best practices
- Contamination limits
- Mitigations
- Cleaning
- Conformal coating
Who Will Benefit
This course is for product and design engineers, manufacturing process and assembly/packaging engineers, engineering managers, senior design technicians, quality and reliability engineers, consultants and academic specialists requiring an understanding of the issues associated with cleanliness and contamination in electronic packaging and applications.
What You Will Learn
Surface mount and through-hole soldering processes are challenging and Pb-free soldering creates another level of complexity. This workshop identifies and examines the critical process parameters associated with Pb-free reflow and wave soldering. Participants will examine these processes from multiple viewpoints including components, substrates, flux, solder alloys and the equipment. The goal is to successfully merge these topics into robust Pb-free reflow and wave soldering processes. Each topic uses a "what changed" approach to examine the differences between SnPb and Pb-free soldering plus the basic theory of operation, recommended operating parameters, monitoring and measuring concepts, and related industry standards.
Soldering profiles should be based on the physical and chemical parameters that influence the soldering process; they should not be developed by trial and error. Four critical factors – substrates, components, flux and solder – influence soldering profiles. This presentation will cover these topics plus time and temperature profiles, zone and preheat parameters, conveyor speed calculation, profiling methods, profiling equipment and mixed alloy (Sn/Pb and Pb-free) soldering. The reliability of Pb-free substrates and solder joints are key concerns; reliability testing and failure analysis for both of these topics will also be covered. In particular, substrate (PCB) reliability has been hit hard by the transition to Pb-free.
THURSDAY,
October 28
Soldering - Thursday
**FREE half day course for all SMTAI MEMBERS! You are required to register for the course to receive a handout and a Certificate of Completion, but there is no charge for this practical course presented by STAR Instructor, Rob Rowland.**
T20 Pb-free Reflow and Wave Soldering Yield Improvement
Rob Rowland, RadiSys Corporation
(Instructor
Bio)
Thursday, October 8
8:00am – 11:30am, Oceanic 3
What You Will Learn
Surface mount and through-hole soldering processes are challenging and Pb-free soldering creates another level of complexity. This workshop identifies and examines the critical process parameters associated with Pb-free reflow and wave soldering. Participants will examine these processes from multiple viewpoints including components, substrates, flux, solder alloys and the equipment. The goal is to successfully merge these topics into robust Pb-free reflow and wave soldering processes. Each topic uses a "what changed" approach to examine the differences between SnPb and Pb-free soldering plus the basic theory of operation, recommended operating parameters, monitoring and measuring concepts, and related industry standards.
Soldering profiles should be based on the physical and chemical parameters that influence the soldering process; they should not be developed by trial and error. Four critical factors – substrates, components, flux and solder – influence soldering profiles. This presentation will cover these topics plus time and temperature profiles, zone and preheat parameters, conveyor speed calculation, profiling methods, profiling equipment and mixed alloy (Sn/Pb and Pb-free) soldering. The reliability of Pb-free substrates and solder joints are key concerns; reliability testing and failure analysis for both of these topics will also be covered. In particular, substrate (PCB) reliability has been hit hard by the transition to Pb-free.
Who Will Benefit
This workshop is intended for individuals who are involved in the transition to Pb-free reflow and wave soldering. The information presented in this course will be beneficial to anyone involved with Pb-free reflow and wave soldering including engineers, operators and managers. Some basic knowledge of surface mount technology is helpful but not essential.
Topics Covered
Steps to creating reflow and wave profiles
Component issues and concerns
PCB and component surface finishes
Tin whisker theory and risk
Moisture sensitive devices
PCB material issues and concerns
Flux issues and concerns
SnPb and Pb-free solder alloy options
Mixed alloy (Sn/Pb and Pb-free) soldering
Sn/Pb and Pb-free soldering profiles
Pb-free substrate (PCB) reliability
Pb-free solder joint reliability
Voiding and head in pillow defects
Pad cratering and CAF defects
Related industry standards
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