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SMTAnews
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SMTA Capital Chapter Expo - Early Bird Registration Deadline Extended
The SMTA Capital Chapter extended the Early Bird Exhibitor registration deadline until August 15, 2011. The chapter is looking forward to a successful Expo & Tech Program and invites everybody who has not signed up yet, to register and safe the space. Only limited table space available! As an exhibitor you get one tabletop exhibit space to display your products and services, directory listing as well as the complete attendee list. The SMTA Capital Expo & Tech Program is scheduled for Tuesday, September 13, 2011 from 8am-4pm at the Johns Hopkins University/Applied Physics Lab. Plan now to join us for free technical sessions, free lunch and the chance to network with leading suppliers to our industry! To register as an attendee or exhibitor, please follow the link for detailed registration information: http://www.smta.org/expos/#capital |
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SMTA Recognizes and Certifies SMT Assembly Process
The SMTA proudly announces three upcoming offerings of SMT Certification in Schaumburg, Santa Clara, and Fort Worth. The SMTA Certification program is unique as it recognizes and certifies the entire SMT assembly process at an engineering level. Each SMTA Certification program is a three-day offering consisting of a 1.5-day refresher workshop on topics in SMT Processes or Six Sigma/Greenbelt. The program concludes on days two and three with an open and closed book examination. Fall 2011 SMT Certification Dates and Locations: Sept 20-22 (Processes) - Schaumburg, IL October 3-5 (Processes & Six Sigma/Green Belt) - Santa Clara, CA October 18-20 (Processes & Six Sigma/Green Belt) - Fort Worth, TX SMTA Certification is intended for manufacturing and process engineers. Additionally, production, design, test and quality engineering personnel, as well as SMT assembly managers who want to confirm their current competence at a fundamental level of overall process technology should also consider participating. For information on certification or to register, contact Patti Hvidhyld at 952-920-7682 or patti@smta.org, or visit www.smta.org/certification/certification.cfm. |
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Announcing Lead-Free Soldering Technology Symposium at SMTA International
The SMTA announced that the renamed Lead-Free Soldering Technology Symposium will be held on October 20, 2011 as a focused symposium at SMTA International in Ft. Worth, TX. The scope of this year's symposium is the reliability of interconnections, particularly those studied in the second phase of the NASA-DoD Pb-Free Consortium project. The project is providing unprecedented data on the long-term performance of Pb-free interconnections addressing alternative surface finishes as well as the performance of mixed SnPb/Pb-free solder joints and the effects of rework activities. Session topics include an Overview and Update of the NASA-DoD Lead-Free Electronics Project, Investigating the Edges of Lead-Free Assembly Processes, Mechanical Reliability Performance of Lead-Free Solder Alloys, and the Impact of Alloy Composition, Design and Load Parameters in Lead-Free Solder Joint Reliability. Papers will be presented by speakers from IBM, Celestica, Boeing, NASA, Rockwell Collins, Alcatel-Lucent and Amkor Technology among others. “Programmatic Challenges of Pb-Free Technology for the High-Reliability Electronics Industry” is the title of the keynote address given by Paul Vianco, Ph.D., Sandia National Laboratories and symposium chair and co-organizer. Details of the Lead-Free Soldering Technology Symposium can be found at http://www.smta.org/smtai/symposium.cfm#lf or contact SMTA administrator JoAnn Stromberg: 952-920-7682 or joann@smta.org. |
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International Wafer-Level Packaging Conference (IWLPC) Program Finalized and Registration Now Open
The SMTA and Chip Scale Review magazine are pleased to announce the presentation line-up for the 8th Annual International Wafer-Level Packaging Conference. The IWLPC will be held October 3-6, 2011 at the Santa Clara Marriott Hotel in Santa Clara, California. Registration is now available on-line and Early Bird conference pricing is in effect until September 2, 2011, after which registration prices will go up $100. Attendees will benefit by gaining the latest knowledge with eight application-oriented tutorials, 10 technical sessions, two expert panel discussions, and a keynote presentation from distinguished speaker Raj Master, General Manager, Microsoft Hardware Silicon, Packaging, Quality and Reliability, titled "Thermal and Power Considerations in Electronics Packaging." The conference includes three tracks with two days of technical paper presentations covering: Wafer Level Packaging; 3-D (Stacked) Packaging; and MEMS Packaging. Exhibit space is limited but there are still tabletop spaces available. Please contact Seana Wall, seana@smta.org, at SMTA or any sales representative with Chip Scale Review at info@chipscalereview.com with questions or for more information about the exhibition. This premier industry event explores leading-edge design, material, and process technologies focused on Wafer-Level Packaging applications. There will be special emphasis on the numerous device and end product applications (RF/wireless, sensors, mixed technology, optoelectronics) that demand wafer-level packaging solutions for integration, cost, and performance requirements. Visit http://www.iwlpc.com for more information. Contact Patti Hvidhyld at 952-920-7682 or patti@smta.org with questions. |
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SMTA Capital Chapter Announces Speakers for their Vendor Day
July 15, 2011 - The Capital Chapter is pleased to announce the second technical presentation for their Expo and Tech Forum which will be held at the Johns Hopkins University, in Laurel MD on September 13, 2011. This year's Technical Program includes four presentations given by industry experts and focusing on key topics. David Pinsky, Raytheon Integrated Defense Systems, will present “Practical tin whisker risk management for high-reliability systems”. The presentation will focus on practical aspects of managing tin whisker risks within the context of high reliability systems. A methodology for performing application-specific risk assessments will be presented that is based on a risk assessment algorithm. The critical topic of controlling purchased materials, components, and assemblies will be also addressed. David is an Engineering Fellow with Raytheon Integrated Defense Systems with over 28 years of industry experience in failure analysis and materials selection for aerospace products. He chairs the Raytheon Tin Whisker Core Team as well as the Raytheon Global Substances Engineering Team. Mr. Pinsky developed the Raytheon policy and standard practices for tin whisker risk mitigation. He is a member of the Lead-Free Electronics Risk Management (PERM) working group and served as an invited lead-free SME on the DoD's Lead-Free Manhattan Project (LFMP). David has published numerous papers in the area of whisker theory and risk management, and authored the chapter on reliability in a textbook on green electronics. The Chapter has scheduled a total of 4 presentations throughout the day, and details will be announced in the following weeks. In addition to the presentations, attendees will have the opportunity to meet industry experts and partners and have the possibility to find answers to their process questions. To register as an attendee or exhibitor, please follow the link for detailed registration information: http://www.smta.org/expos/#capital Early Bird registration ends July 31, 2011! |
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